
Ultra-Fast Hardware Metrics Prediction
Using LLMs to revolutionize chip design process efficiency
RocketPPA introduces a breakthrough approach that enables real-time estimation of power, performance, and area (PPA) directly from Verilog code, accelerating the hardware design workflow.
- Leverages a curated 21,000 synthesizable Verilog modules dataset with detailed PPA metrics
- Applies chain-of-thought techniques to automatically debug and improve dataset fidelity
- Delivers PPA estimates in milliseconds compared to traditional synthesis tools that take minutes or hours
- Demonstrates practical applications for early-stage design exploration and optimization
This innovation significantly reduces hardware design iteration cycles, potentially transforming semiconductor development timelines and enabling more efficient chip design processes for complex systems.
RocketPPA: Ultra-Fast LLM-Based PPA Estimator at Code-Level Abstraction