This research introduces a text-attributed graph model that combines the structural understanding of graphs with the functional comprehension of language models for circuit representation.

• Integrates RTL code, gate-level netlists, and layout information to create comprehensive circuit representations
• Leverages both graph neural networks and language models in a multimodal approach
• Demonstrates superior performance on complex gate functionalities beyond simple and-inverter graphs (AIGs)
• Enables more effective automation in electronic design workflows

This innovation matters for electronic engineering by bridging the gap between structural circuit analysis and functional understanding, potentially accelerating design verification and optimization in the EDA pipeline.

NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph