Research exploring how large language models can automate and improve interpretability in custom hardware design for ML workloads.

• Addresses time-consuming manual documentation in hardware accelerator design
• Leverages LLMs to automate design interpretability tasks
• Creates opportunities for more efficient hardware development workflows
• Bridges the gap between ML advances and hardware engineering

This research matters for engineering teams by potentially reducing development time, improving documentation quality, and enabling more efficient collaboration in complex hardware design projects.

ML For Hardware Design Interpretability: Challenges and Opportunities