Researchers have developed RIGHTS, a novel LLM-based approach that analyzes RTL assertion failures and automatically suggests fixes for hardware designs.

• Transforms complex hardware verification problems into natural language tasks that LLMs can process
• Achieves 85.7% accuracy in solving real-world assertion failures
• Reduces debug time from hours to just minutes through automated root cause analysis
• Demonstrates how LLMs can be applied to specialized engineering domains beyond software

This research significantly advances hardware verification workflows, allowing engineers to focus on design rather than debugging, while improving overall system reliability and security.

Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design